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| INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT251 8-input multiplexer; 3-state Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification 8-input multiplexer; 3-state FEATURES * True and complement outputs * Both outputs are 3-state for further multiplexer expansion * Multifunction capability * Permits multiplexing from n-lines to one line * Output capability: standard * ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT251 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns 74HC/HCT251 The 74HC/HCT251 are the logic implementations of single-pole 8-position switches with the state of three select inputs (S0, S1, S2) controlling the switch positions. Assertion (Y) and negation (Y) outputs are both provided. The output enable input (OE) is active LOW. The logic function provided at the output, when activated, is: Y = OE.(I0.S0.S1.S2 + I1.S0.S1.S2 + + I2.S0.S1.S2 + I3.S0.S1.S2 + + I4.S0.S1.S2 + I5.S0.S1.S2 + + I6.S0.S1.S2 + I7.S0.S1.S2) Both outputs are in the high impedance OFF-state (Z) when the output enable input is HIGH, allowing multiplexer expansion by tying the outputs. TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay In to Y In to Y Sn to Y Sn to Y CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". input capacitance power dissipation capacitance per package notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 15 17 20 21 3.5 44 19 19 20 21 3.5 46 ns ns ns ns pF pF HCT UNIT December 1990 2 Philips Semiconductors Product specification 8-input multiplexer; 3-state PIN DESCRIPTION PIN NO. 4, 3, 2, 1, 15, 14, 13, 12 5 6 7 8 11, 10, 9 16 SYMBOL I0 to I7 Y Y OE GND S0, S1, S2 VCC NAME AND FUNCTION multiplexer inputs multiplexer output 74HC/HCT251 complementary multiplexer output 3-state output enable input (active LOW) ground (0 V) select inputs positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. December 1990 3 Philips Semiconductors Product specification 8-input multiplexer; 3-state FUNCTION TABLE INPUTS OE H L L L L L L L L L L L L L L L L Note 1. H = HIGH voltage level L = LOW voltage level X = don't care Z = high impedance OFF-state S2 X L L L L L L L L H H H H H H H H S1 X L L L L H H H H L L L L H H H H S0 X L L H H L L H H L L H H L L H H I0 X L H X X X X X X X X X X X X X X I1 X X X L H X X X X X X X X X X X X I2 X X X X X L H X X X X X X X X X X I3 X X X X X X X L H X X X X X X X X I4 X X X X X X X X X L H X X X X X X I5 X X X X X X X X X X X L H X X X X I6 X X X X X X X X X X X X X L H X X 74HC/HCT251 OUTPUTS I7 X X X X X X X X X X X X X X X L H Y Z H L H L H L H L H L H L H L H L Y Z L H L H L H L H L H L H L H L H Fig.4 Functional diagram. Fig.5 Logic diagram. December 1990 4 Philips Semiconductors Product specification 8-input multiplexer; 3-state DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC SYMBOL PARAMETER +25 -40 to +85 max. 215 43 37 220 44 37 255 51 43 255 51 43 175 35 30 170 35 30 95 19 16 -40 to +125 min. max. 255 51 43 265 53 45 310 62 53 310 62 53 210 42 36 210 42 36 110 22 19 ns 74HC/HCT251 TEST CONDITIONS UNIT V WAVEFORMS CC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Fig.6 min. typ. max. min. tPHL/ tPLH propagation delay In to Y propagation delay In to Y propagation delay Sn to Y propagation delay Sn to Y 3-state output enable time OE to Y, Y 3-state output disable time OE to Y, Y output transition time 50 18 14 55 20 16 66 24 19 69 25 20 36 13 10 39 14 11 19 7 6 170 34 29 175 35 30 205 41 35 205 41 35 140 28 24 140 28 24 75 15 13 tPHL/ tPLH ns Fig.7 tPHL/ tPLH ns Fig.6 tPHL/ tPLH ns Fig.7 tPZH/ tPZL ns Fig.7 tPHZ/ tPLZ ns Fig.7 tTHL/ tTLH ns Figs 6 and 7 December 1990 5 Philips Semiconductors Product specification 8-input multiplexer; 3-state 74HC/HCT251 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT In S0 S1, S2 OE UNIT LOAD COEFFICIENT 1.00 1.50 1.50 1.50 AC CHARACTERISTICS FOR HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HCT SYMBOL PARAMETER +25 min. typ. tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH tPZH/ tPZL tPHZ/ tPLZ tTHL/ tTLH propagation delay In to Y propagation delay In to Y propagation delay Sn to Y propagation delay Sn to Y 3-state output enable time OE to Y, Y 3-state output disable time OE to Y, Y output transition time 22 22 24 25 13 14 7 -40 to +85 -40 to +125 UNIT V WAVEFORMS CC (V) ns ns ns ns ns ns ns 4.5 4.5 4.5 4.5 4.5 4.5 4.5 Fig.6 Fig.7 Fig.6 Fig.7 Fig.7 Fig.7 Figs 6 and 7 TEST CONDITIONS max. min. max. min. max. 35 35 44 44 28 28 15 44 44 55 55 35 35 19 53 53 66 66 42 42 22 December 1990 6 Philips Semiconductors Product specification 8-input multiplexer; 3-state AC WAVEFORMS 74HC/HCT251 (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3V; VI = GND to 3 V. Fig.6 Waveforms showing the multiplexer input (In) and select input (Sn) to output (Y) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3V; VI = GND to 3 V. Fig.7 Waveforms showing the multiplexer input (In) and select input (Sn) to output (Y) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3V; VI = GND to 3 V. Fig.8 Waveforms showing the 3-state enable and disable times. PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines". December 1990 7 |
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